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--- en:uhsdr_dev:segger_j_link [27.02.2018 05:47] – df9ts_user
+++ en:uhsdr_dev:segger_j_link [27.02.2018 08:46] (current) – df9ts_user
@@ Line 1: / Line 1: @@
-Segger Tools require a Segger probe to be used. For non-commercial use Segger offers the low priced "J-Link Edu" probe
+==== Segger J-Link Introduction ====
+Segger provides a probe - J-Link - that can be used for programming and debugging. For non-commercial use Segger offers the low priced [[https://www.segger.com/products/debug-probes/j-link/models/j-link-edu/|J-Link Edu]] probe.
 Segger supports the Cortex M7 SWV interface used on OVI40 UI and offers plug-ins for MCU eclipse.
-For Debug output Segger offers two options in MCU eclipse:
+For Debug output Segger offers an two options in MCU eclipse:
   * TRACESWO output as defined by CORTEX M7. This requires a dedicated pin, currently used for M3 pushbutton switch
-  * Segger Real Time Tracing (RTT) with outputs debug messages in high speed via SWV debug lines (CLK and SWData). No need for an additional line to printout debug messages
+  * [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|Segger Real Time Tracing (RTT)]] with outputs debug messages in high speed via SWV debug lines (CLK and SWData). No need for an additional line to printout debug messages (as is the case with TRACESWO).
+The J-Link makes use of the Cortex-M feature, which allows accessing the memory via the debug interface while the target is running.
+How this works in general is described [[https://www.segger.com/jlink-rtt.html|here]].
 The speed advantage of RTT - according to Segger data - is impressive:
@@ Line 59: / Line 64: @@
 The RTT target code is shipped as part of the J-Link Software and Documentation Pack which can be downloaded [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|here]]. The RTT sources can be found in the J-Link software package under: Samples/RTT
+=== Calling SEGGER_RTT print from within interrupts / make it re-entrant ===
+During RTT output the functions SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() are called by default in RTT, but the function bodies of those functions are empty and need to be implemented according to MCU used and use case.
+Please implement
+  * SEGGER_RTT_LOCK()
+  * SEGGER_RTT_UNLOCK()
+  * .. and disable interrupts and threads which might use RTT in SEGGER_RTT_LOCK() and enable them again in SEGGER_RTT_UNLOCK().
+  * See [https://mcuoneclipse.com/2014/01/26/entercritical-and-exitcritical-why-things-are-failing-badly/|here]] for a discussion on how to enable / disable interrupts on Cortex-M
 ==== J-Link support for Option bytes and Lock / Unlock ====
@@ Line 82: / Line 96: @@
 [{{:en:uhsdr_dev:j-flash.png?400|Segger J-Flash Lite tool}}]
-==== Converting on-board ST-Link On-Board into J-Link On-Board ====
+==== Get to know J-Link: Converting on-board ST-Link On-Board into J-Link On-Board ====
-Fpr experiments with J-Link (not related to OVI40, but in order to get to know J-Link HW & SW) the on-board ST-Link board of those boars can be converted to J-Link, see [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]].
+  * Certain STM32 development boards contain an ST-Link probe.
+  * For experiments with J-Link (not related to OVI40, but in order to get to know J-Link HW & SW) the on-board ST-Link board of those boars can be converted to J-Link, see [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]].
+  * Compatible STM32 that can be re-flashed are listed [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]].